Computer Architecture & ML Systems

Seung Yul Lee

Postdoctoral Researcher, Seoul National University  ·  Advisor: Prof. Jae W. Lee

I design acceleration techniques for the fundamental operations behind modern deep learning — co-designing hardware and software, from RTL and the Linux kernel up to frameworks and model code, so that critical applications run faster and scale further.

Published at
ICLR ICML MICRO ISCA DAC USENIX ATC ICCAD Nature Comms.
01

Research

hardware ↔ kernel ↔ framework ↔ model

I develop novel acceleration techniques for fundamental operations, primarily through hardware–software co-design, paving the way for more efficient and scalable adoption of critical applications.

/01

AI for Science — MLIPs

Accelerating Machine Learning Interatomic Potentials by targeting the tensor product — the core and most expensive operation in equivariant neural networks — through custom GPU kernel design.

MLIPTensor productEquivariant NNGPU kernels
/02

State space models

Designing a dedicated hardware accelerator with a fused kernel for scalable inference of state space models, a promising architecture for efficient long-sequence modeling.

SSMLong-sequenceHW acceleratorFused kernel
/03

Full-stack acceleration

Earlier, accelerating a broad range of workloads — LLMs, CNNs, inverted-index search, and mobile application switching — with full-stack expertise from hardware design and the Linux kernel to software-stack and DNN-model optimization.

LLMs · CNNsSearchMobile / AndroidKernel ↔ HW
02

Publications

8 conference · 2 journal
Conference Paperspeer-reviewed
2026
ICLR ’26
SpareTrain: Fault-Tolerant LLM Training via Low-Cost Dual Modular Redundancy
Rihae Park, Yeonjae Kim, Seung Yul Lee, Yeonhong Park, Jae W. Lee
Implemented low-cost redundancy-based error detection by modifying the PyTorch framework.
2025
ICML ’25
FlashTP: Fused, Sparsity-Aware Tensor Product for Machine Learning Interatomic Potentials
Seung Yul Lee, Hojoon Kim, Yutack Park, Dawoon Jeong, Seungwu Han, Yeonhong Park, Jae W. Lee
Developed fused GPU kernels for a key operation in Machine Learning Interatomic Potentials.
★ Spotlight Poster — top 2.6%
2024
MICRO ’24
VGA: Hardware Accelerator for Scalable Long Sequence Model Inference
Seung Yul Lee, Jihoon Hong, Hyunseung Lee, SangLyul Cho, Jae W. Lee
Designed an accelerator that generates operands on-the-fly, shrinking the SRAM footprint of the fused kernel.
2023
DAC ’23
A Memory-Efficient Edge Inference Accelerator with XOR-based Model Compression
Hyunseung Lee, Jihoon Hong, Soosung Kim, Seung Yul Lee, Jae W. Lee
Proposed a layer-wise compression-ratio selection scheme to cut the overhead of XOR-based compression.
2022
DAC ’22
Effective Zero Compression on ReRAM-based Sparse DNN Accelerators
Hoon Shin, Rihae Park, Seung Yul Lee, Yeonhong Park, Hyunseung Lee, Jae W. Lee
Introduced a novel mapping scheme to aggregate non-zero weights into the same execution unit.
2021
USENIX ATC ’21
ASAP: Fast Mobile Application Switch via Adaptive Prepaging
Sam Son, Seung Yul Lee, Yunho Jin, Jonghyun Bae, Jinkyu Jeong, Tae Jun Ham, Jae W. Lee, Hongil Yoon
Built an adaptive prepaging system across the full stack, from the Linux kernel to the Android framework.
2021
ISCA ’21
BOSS: Bandwidth-Optimized Search Accelerator for Storage-Class Memory
Jun Heo, Seung Yul Lee, Sunhong Min, Yeonhong Park, Sung Jun Jung, Tae Jun Ham, Jae W. Lee
Developed a search-algorithm accelerator that mitigates the limitations of storage-class memory.
2020
ICCAD ’20
Unlocking Wordline-level Parallelism for Fast Inference on RRAM-based DNN Accelerator
Yeonhong Park, Seung Yul Lee, Hoon Shin, Jun Heo, Tae Jun Ham, Jae W. Lee
Presented a novel error-correction scheme enabling increased parallel execution in an RRAM accelerator.
Journal Paperspeer-reviewed
2026
Nat. Commun. ’26
Optimizing Cross-Domain Transfer for Universal Machine Learning Interatomic Potentials
J. Kim, J. You, Y. Park, Y. Lim, Y. Kang, J. Kim, H. Jeon, S. Ju, D. Hong, Seung Yul Lee, et al.
Enabled efficient model training by developing and applying the FlashTP tensor-product kernel.
2022
J. Mol. Biol. ’22
GalaxyDomDock: An Ab Initio Domain–Domain Docking Web Server for Multi-Domain Protein Structure Prediction
J. Choi, T. Park, Seung Yul Lee, J. Yang, C. Seok
Implemented the core docking algorithm for multi-domain protein structure prediction.
03

Experience & Education

Seoul National University

Experience

2026 — Present
Postdoctoral Researcher
Seoul National University · Computer Science & Engineering
Alternative Military Service. Advisor: Prof. Jae W. Lee.

Education

2020 — 2026
M.S. / Ph.D., Computer Science & Engineering
Seoul National University · GPA 4.13 / 4.3
Dissertation: Accelerating Memory-Bound Operations in Emerging Deep Neural Networks. Advisor: Prof. Jae W. Lee.
★ CSE Outstanding Ph.D. Dissertation Award
2015 — 2020
B.S., Chemistry and Computer Science & Engineering
Seoul National University · GPA 3.89 / 4.3
Minor in Biological Sciences.
★ Cum Laude
04

Honors, Service & Teaching

Honors & Awards

  • 2026AI Seoul Tech Graduate Research Scholarship — Postdoctoral Track (Seoul Future Foundation)
  • 2025NPRC Research Award — Neural Processing Research Center, Samsung Advanced Institute of Technology
  • 2019CUDA Programming Competition — 2nd place, SNU THUNDER Research Group

Professional Service

  • 2026Reviewer — International Conference on Machine Learning (ICML)
  • 2026Reviewer — IEEE/ACM International Symposium on Microarchitecture (MICRO)

Teaching

  • Mar – Jun 2022Head Teaching Assistant — Computer Programming, SNU. Object-oriented programming with C++ and Java.
05

Skills

Languages

PythonCC++CUDAChiselJava

Frameworks

PyTorchTensorFlowKeras

Tools

Nsight Compute/SystemsDockerGit

Platforms

LinuxAndroidAWSGoogle CloudGPUTPU
06 — Contact

Open to research roles.
Reach me at triomphant1@snu.ac.kr

Seung Yul Lee · Computer Architecture & ML Systems Korean (Native) · English (Proficient)